The present invention pertains generally to the field of radio frequency (RF) amplifiers and more specifically to high frequency, high power transistors used in wireless communication applications.
The use of RF power amplifiers in wireless communication applications is well known. With the recent growth in the demand for wireless services, such as personal communication services, the operating frequency for wireless networks has increased dramatically and is now in excess of two gigahertz. RF power amplifier stages are commonly used in wireless communication network radio base station amplifiers. Such power amplifiers are also widely used in other RF-related applications, such as cellular telephones, paging systems, navigation systems, television, avionics, and military applications. At the, high frequencies that such circuits must operate, impedance matching and biasing of the active elements is an important factor for efficient operation of the power amplifier. The input and output circuits used to match power transistors to external devices are typically implemented with a combination of bondwire inductance, stripline or microstrip structures on a printed circuit board, and discrete capacitors.
A typical common source power amplifier stage, as illustrated in FIGS. 2 and 3, has an RF feed, a power transistor 200, and an RF output. The power transistor 200 is a three terminal device, having an input terminal 210, an output terminal 220, and a common terminal that is the flange 205 which is grounded. The power transistor 200 amplifies the low power signal coming from the RF feed, into a high power signal delivered from the RF output to a load. An input bias network provides a DC voltage, called the input bias feed, to the power transistor 200 establishing an input operating point for the transistor 200. An output bias network provides a DC voltage, called the output bias feed, to the power transistor 200 establishing an output operating point for the transistor 200.
An input impedance transformer 231 transforms the impedance of the RF feed (typically 50 ohms) into the impedance at input terminal 210 (typically 8-10 ohms) at the frequency and power level of operation. The input impedance transformer 231 is typically a microstrip transmission line of xc2xc wavelength (lambda) at the operating frequency.
Similarly, an output impedance transformer 241 transforms the load impedance at the output terminal 220 (typically 1 to 10 ohms) into the impedance at the RF output (typically 50 ohms) at the frequency and power level of operation. The output impedance transformer 241 is also preferably a microstrip transmission line of xc2xc lambda at the operating frequency.
Input blocking capacitor 232 prevents DC voltages from entering the wrong amplifier stage. Output blocking capacitor 242 prevents loading by the RF output circuits by blocking DC voltages from the RF output.
In addition, it is important to prevent high frequency signals generated inside the power amplifier stage from escaping along unwanted transmission paths. In order to prevent the high frequency signals in the power amplifier from contaminating the sources of DC voltage which bias the amplifier, designers typically use a xc2xc lambda transmission line, implemented with a microstrip structure. Transmission line theory predicts that a xc2xc lambda transmission line terminated at its distal end with a short circuit has an input impedance, at the proximal end, that is equal to an open circuit. As a practical matter, a one-quarter wavelength transmission line terminated with a relatively low impedance presents a high impedance to the driving source. This approach prevents RF power directed toward the input terminal 210 from leaking into the input bias network, and provides a method of coupling a DC voltage into the power transistor 200, without disturbing the impedance matching structures.
For instance, on the input bias circuit illustrated in FIGS. 2 and 3, an input bias transmission line 233 is a xc2xc lambda transmission line which has its distal end coupled to the DC voltage source of input bias feed. The proximal end is coupled to the power transistor input terminal 210. The combination of the DC voltage source of input bias feed, and decoupling capacitors 234 and 235 approaches a short circuit over a broad range of frequencies at the distal end of line 233.
Capacitor 234 has a small capacitance value and is selected to have series resonance at or near the operating frequency. Typical values for capacitor 234 are 5 to 50 pF with ceramic dielectric. Capacitor 235 has a large capacitance value and is selected to have high capacitive reactance and moderate inductance for lower intermediate frequencies. Typical values for capacitor 235 are 0.05 to 0.5 uF with tantalum dielectric. Should the amplifier be operated as a Continuous Wave (CW) amplifier, capacitor 235 is not required for adequate decoupling.
The DC voltage source of input bias feed voltage forms a short circuit for low frequency AC signals and DC. Since the distal end of the line 233 is terminated with a short circuit, the input impedance of the line 233 at the proximal end appears to be an open circuit to the high frequency signals near the input terminal 210. This open circuit blocks RF signals from escaping along unwanted paths, and in particular from contaminating the DC voltage source of input bias feed.
Similarly, a xc2xc lambda transmission line is used to prevent RF signals from the output terminal 220 from flowing back into the DC voltage source of the output bias feed. An output bias transmission line 243 is a xc2xc lambda transmission line which has its distal end coupled to the DC voltage source of output bias feed. The proximal end is coupled to the power transistor output terminal 220. The combination of the DC voltage source of output bias feed, and decoupling capacitors 244 and 245 form s a short circuit over a broad range of frequencies at the distal end of line 243. Capacitor 244 has a small capacitance value and is selected to have series resonance at or near the operating frequency. Typical values for capacitor 244 are 5-50 pF with ceramic dielectric. Typical values for capacitor 245 are 0.05 to 0.5 uF with tantalum dielectric. Since the distal end of the line 243 is terminated with a short circuit, the input impedance of the line 243 at the proximal end appears to be an open circuit to the signals near the output terminal 220 which blocks RF signals from contaminating the DC voltage source of output bias feed.
Although using a xc2xc lambda transmission line for providing input and output bias to transistor 200 has been found to be a practical biasing solution, there are several factors that make its use less than optimal. Considerable area on the printed circuit board is required for its implementation, reducing the packaging density for the amplifier. In addition, the xc2xc lambda transmission tends to radiate RF energy, reducing the overall amplifier efficiency. Further, coupling the xc2xc lambda transmission line to the power transistor input is difficult to model due to unequal distributed element effects that complicate the design process.
The physical configuration of a typical power transistor 200 is illustrated, in more detail, in FIG. 1A, and an equivalent circuit for transistor 200 appears in FIG. 3. The power transistor 200 has a transistor die 219, a gate tuning network, and a drain tuning network. The transistor die 219 is preferably a field effect transistor die and particularly a lateral diffused metal-oxide-silicon device (LDMOS) with a gate and drain region formed on the upper surface. A high conductivity sinker region is formed to provide a low resistance conduction path between a source region and the lower surface of the die 219. The die 219 is bonded to the flange 205, thereby thermally and mechanically coupling the die to the flange and electrically coupling the source to the flange. In the figures and text that follow, the transistor die is illustrated to be an LDMOS device, a skilled practitioner will appreciate that there are numerous other die type choices which will produce an acceptable amplifier.
Bond wires are used to electrically couple the gate of a die 219 to the input terminal 210 and the drain of the die 219 to the output terminal 220. Bond wires are also used to interconnect other components. These bond wires have self-inductance that cannot be neglected at typical frequencies of operation. The gate tuning network is required to effectively couple RF power coming from the RF feed to the gate of the die 219. Similarly, the drain tuning network is also required to effectively couple RF power coming from the drain of the die 219 to the RF output and load.
The gate matching network provides compensation for the bond wire inductors, as well as the input capacitance associated with the gate of the die 219. The gate tuning network includes a xe2x80x9cT-network,xe2x80x9d and a xe2x80x9cshunt network.xe2x80x9d The T-network includes a first bond wire inductance 211 coupled to the input terminal 210, a second bond wire inductance 212 coupled to the gate of the die 219, and a first input capacitor 216 coupled to ground on the flange 205, each coupled to a central node. The shunt network includes a third bond wire inductance 213 coupled to a second input capacitance 217 of relatively high capacitance. Second input capacitance 217 is a blocking capacitor, which prevents the inductance 213 from shorting the DC bias at the gate of the die 219 to ground. The third input bond wire inductance 213 is coupled to the gate of die 219, and the second input capacitor 217 is coupled to ground on the flange 205.
The T-network transforms the impedance xe2x80x9clookingxe2x80x9d into the transistor input terminal 210 at the fundamental frequency to match the output impedance of line 231. The shunt network provides resonance at the fundamental signal frequency, while negating gate reactance.
The drain matching network provides compensation for the bond wire inductors, as well as the capacitance associated with the drain of die 219. The drain tuning network includes a shunt network and a series inductance. The series inductance is the result of a fifth bond wire 215 connecting the drain of the die 219 to the output terminal 220. The shunt network includes a fourth bond wire inductance 214 coupled to an first output capacitor 218. The fourth bond wire inductance 214 is coupled to the drain of the die 219, and the first output capacitor 218 is coupled to ground on the flange 205. These components provide broadband matching at a predetermined load impedance, to provide a desired power level for efficient amplifier operation.
FIG. 1B illustrates the physical configuration of an alternate form of a power transistor. 100 with two circuits similar to those of transistor 200 coupled and operating in parallel. Like transistor 200, transistor 100 has three terminals: an input terminal 110, an output terminal 120, and a flange 105. A first die circuit has a die, a gate tuning network, and a drain tuning network. A second die circuit has a die, a gate tuning network, and a drain tuning network. Within economical and practical manufacturing tolerances, the two die circuits are matched so that the load is shared by each die circuit approximately equally. Each circuit functions as described above with transistor 200. The skilled practitioner will also appreciate that three or more die circuits can be coupled in parallel to provide additional power handling capability.
The input bias transmission line 233 and output bias transmission line 243 take up considerable and valuable space on the printed circuit board that contains them. Three terminal RF power transistor packages have limited the choices that designers have available to them for providing input bias voltage and output bias voltage. The need for increasingly high density packaging in RF amplifiers suggests that reducing the board space consumed by an amplifier stage is desirable and lowers cost. Thus there is a need for an input biasing circuit and output biasing circuit which makes more efficient use of printed circuit board space, without substantial performance loss.
In accordance with a general aspect, inventions disclosed and described herein are directed to high frequency, high power, broadband RF amplifiers designed and constructed to overcome the above-described problems, and allow for easier large-scale manufacturing.
In one embodiment, the broadband RP amplifier includes a power transistor package with 5 terminals. As illustrated in FIG. 4A, power transistor 300 has an input terminal 310, an output terminal 320, a flange 305, an input bias terminal 350, and an output bias terminal 360. The addition of the input bias terminal 350 when used in cooperation with a novel biasing circuit, eliminates the need for a xc2xc lambda input bias transmission line, thereby reducing the total area occupied by the amplifier stage. The output bias terminal 360 is treated in a similar way, eliminating the need for a xc2xc lambda output bias transmission line.
In another embodiment, the broadband RF amplifier includes a power transistor package with 7 terminals. As illustrated in FIG. 4B, power transistor 500 has an input terminal 510, an output terminal 520, a flange 505, a first input bias terminal 550, a second input bias terminal 551, a first output bias terminal 560, and a second output bias terminal 561. The addition of the first and second input bias terminals, 550 and 551 respectively, when used in cooperation with a novel biasing circuit, eliminates the need for a first and second xc2xc lambda input bias transmission line, thereby reducing the total area occupied by the amplifier stage. Similar for the first and second output bias terminals.
Other aspects and features of the inventions disclosed herein will become apparent hereinafter.